This invention relates to a processor, and more particularly, to a control unit which generates control signals for controlling the arithmetic and logic unit, in the execution of a microinstruction currently being held in a microinstruction register.
Processors execute a variety of instructions, which can include arithmetic type instructions, shift type instructions, logical type instructions, data manipulative type instructions, . . . These instructions can be categorized as memory-to-memory instructions, memory-to-register instructions, register-to-register instructions, . . . , and as a result can be further classified as a type one instruction, type two instruction, . . . , each type of instruction having a corresponding instruction format. Various approaches currently exist for executing a macro instruction in a microprogrammable microprocessor. In one such implementation, a firmware program, or routine (i.e., group of instructions) can reside in a control store (or control memory) which stores the group of microinstructions. When the operation code (OP code) of a macro instruction is initially decoded, one of the firmware routines can be invoked and executed. For a predetermined type of macro instruction, such as the data manipulative type macro instruction, the basic operation can be common to more than one macroinstruction, for example, "TEST BIT FOR A LOGIC VALUE OF 1", or "TEST BIT FOR A LOGIC VALUE OF 0". Based on the specific instruction, a branch to the corresponding microprogram routine could be performed which would then execute the specific instruction and test the bit specified. This implementation requires several microinstructions to be executed and, requires these microinstructions to be stored in the control store.
In an effort to reduce the size of the control store and to reduce the number of instructions required to be executed in the execution of the macro instruction resulting in a faster execution time, the present invention modifies the microinstruction as it is fetched from the control store and transferred to the microinstruction register. Predetermined fields of the microinstruction are modified with predetermined fields of the macro instruction which specifies the variation of the basic OP code, thereby modifying the basic operation, decreasing the execution time of the macro instruction, and resulting in speeding up the execution time of the macro instruction.